I/O mapping in CPU

Memory-Mapped I/O vs Port-Mapped I/O: Concepts, Examples, and Comparison

1. What is I/O in Computing?

• I/O (Input/Output) is the mechanism by which a CPU communicates with external devices (peripherals), such as sensors, displays, storage, or communication chips.

2. Memory-Mapped I/O (MMIO)

2.1 Concept

• Peripheral devices are assigned specific memory addresses in the CPU’s address space.
• The CPU uses standard memory read/write instructions (like accessing RAM) to interact with device registers.
• No distinction between memory and I/O: all are accessed via same data and address buses.

2.2 Architecture

• A range of addresses is reserved for peripherals (not used for RAM).
• Peripherals are “mapped” into these addresses.
• Access control via bus logic or MMU (memory management unit).

2.3 Example (C Code, Embedded)

Suppose an LED control register is mapped to address `0x40021018`:

#define LED_REG (*(volatile unsigned int*)0x40021018)
void led_on()  { LED_REG = 1; }
void led_off() { LED_REG = 0; }

• Reading or writing to this address directly interacts with the hardware.

2.4 Real-World Use

• Dominant in microcontrollers (ARM Cortex-M, AVR, STM32, MSP430, etc.)
• Used in modern SoCs, PCIe devices, graphics cards.

3. Port-Mapped I/O (PMIO), aka Isolated I/O

3.1 Concept

• Peripherals are accessed via a separate address space using dedicated I/O instructions.
• The CPU distinguishes between “memory” and “I/O” spaces.
• Only special instructions (like IN, OUT) can communicate with I/O ports.

3.2 Architecture

• Devices are assigned I/O port numbers.
• The CPU issues IN/OUT instructions with the port address to read/write device registers.

3.3 Example (x86 Assembly and C Pseudo-Code)

Suppose a device is mapped to I/O port `0x60`:

// x86 inline assembly in GCC
unsigned char read_data() {
    unsigned char data;
    __asm__ volatile ("inb %1, %0" : "=a"(data) : "Nd"(0x60));
    return data;
}

void write_data(unsigned char val) {
    __asm__ volatile ("outb %0, %1" : : "a"(val), "Nd"(0x60));
}

3.4 Real-World Use

• Used on Intel x86 PCs (ISA, legacy PS/2 keyboards, parallel ports).
• Less common in modern embedded/ARM systems.

4. Comparison: MMIO vs PMIO

5. Memory-Mapped I/O (MMIO) Diagram

   Address Bus (full width)
    |--------------------------|
    |                          |
+---v----+                 +---v---+
|  RAM   |                 |Device |
|(0x0000 |                 |(MMIO  |
| to     |                 |region)|
|0x7FFF) |                 |       |
+--------+                 +-------+
    ^                          ^
    |                          |
+---+--------------------------+---+
|          CPU (MCU/SOC)           |
+---+--------------------------+---+
    |                          |
  Data Bus (full width, shared)

• Key Point:
  • Both RAM and devices (peripherals) are accessed with regular memory instructions using their assigned addresses.
  • No separate I/O instructions or bus; CPU “sees” device registers as special memory locations.

6. Port-Mapped I/O (PMIO) Diagram

            Address Bus (memory only)
             |
         +---v----+
         |  RAM   |
         +--------+
             ^
             |
         +---+-------------------------+
         |           CPU               |
         +---+--------------------+----+
             |                    |
Data   |                    |   I/O Address Bus (smaller, dedicated)
Bus    |                    |    |
             |                    |    v
             |                +---+--------+
             |                | I/O Device |
             |                +------------+
             |                (Port-mapped,
             |                e.g. 0x60)
             |
           (Separate IN/OUT instructions for I/O)

• Key Point:
  • Only RAM is accessed via the main address bus with memory instructions.
  • I/O devices are accessed via a separate, dedicated I/O address space and special instructions (e.g., x86 IN, OUT).
  • The I/O address bus is usually much smaller (e.g., 16 bits for x86).

7. Practical Considerations

• MMIO is preferred for modern embedded and high-performance systems because it simplifies access and code.
• PMIO is largely of historical/legacy interest; useful to understand for OS/driver programming on PCs.
• Security: MMIO can be protected via memory protection units (MPU/MMU); PMIO protection is CPU-specific.

8. Summary Table