Memory Types
Contents
1. RAM (Random Access Memory)
1.1 What is it?
- Volatile memory for fast, temporary storage.
- Random access: any memory cell can be read/written in constant time.
- Types: SRAM (Static), DRAM (Dynamic), plus advanced like RLDRAM, LPDDR.
1.2 Why we need it
- Enables high-speed data processing by CPU/MCU.
- Acts as a workspace for variables, stacks, program execution, and caching.
1.3 Hardware Details
- SRAM: Each bit stored using 6 transistors (cross-coupled flip-flops). No refresh needed.
- Fast access, low density, low power in standby, higher power in active mode.
- Used for: CPU L1/L2/L3 caches, MCU internal RAM.
- DRAM: Each bit stored as a charge in a capacitor, with an access transistor.
- Requires periodic refresh (every few ms) to prevent data loss.
- High density, low cost, slower than SRAM.
- Used as: main memory in PCs, high-end MCUs with external DRAM interfaces.
- LPDDR (Low Power DDR): Special DRAM for mobile devices, with deep power-saving modes.
1.4 Software/Embedded Use
- Stack/Heap Management: Compilers and RTOS allocate program stack, dynamic heap, and static/global data.
- DMA (Direct Memory Access): Peripheral devices access RAM directly, offloading CPU.
- Double-buffering: Used for real-time sensor data (e.g., ADC/DAC), audio streams.
- Caching: Managed by CPU hardware, but software can optimize cache use (e.g., data alignment, cache flush).
1.5 Use Cases
- MCU SRAM for fast I/O buffers.
- PC DRAM for multitasking, large datasets.
- DSPs (Digital Signal Processors) use on-chip RAM for real-time signal processing.
1.6 What more can we do?
- Error correction (ECC RAM) for mission-critical systems.
- Memory protection units (MPU) or MMUs for process isolation.
- Low-power retention RAM for always-on IoT.
2. ROM (Read Only Memory)
2.1 What is it?
- Non-volatile memory for fixed program/data storage.
- Variants: Mask ROM, PROM, OTP (One Time Programmable), EPROM, EEPROM.
2.2 Why we need it
- Secure, unchangeable code storage for bootloaders, root of trust.
- Reliable retention over years/decades.
2.3 Hardware Details
- Mask ROM: Data physically encoded during fabrication by connections/fuses.
- PROM: User-programmable by blowing fuses with high current.
- EPROM: Floating gate transistors, erased by UV light exposure.
- Requires quartz window in IC package.
- OTP ROM: Special case of PROM/EPROM, programmed only once electrically.
2.4 Software/Embedded Use
- Bootloader or BIOS code runs directly from ROM at power-on.
- Interrupt vectors and reset handlers often stored in ROM.
- Security: ROM-stored cryptographic keys, root certificates.
2.5 Use Cases
- Game console cartridges (classic Nintendo, Sega, etc.).
- Factory-programmed firmware for smartcards.
- Security chips for anti-tamper applications.
2.6 What more can we do?
- Combine with Flash/EEROM for field upgrades.
- Use ROM for trusted computing base in secure IoT.
3. Flash Memory
3.1 What is it?
- Non-volatile, solid-state memory: reprogrammable, block/sector-erasable.
- Two main architectures: NOR and NAND.
3.2 Why we need it
- Cheap, high-density, reliable for program/data storage.
- Enables field updates (firmware, OS), mass storage (filesystems).
3.3 Hardware Details
Cell: Floating-gate MOSFET, stores electrons to represent data (charge = 0/1).
NOR Flash: Parallel access, allows direct code execution (XIP - Execute In Place).
- Fast random read, slower writes/erase, used for code storage in MCUs.
NAND Flash: Serial/block access, higher density, better for bulk storage.
- Used in SSDs, SD cards, eMMC/Universal Flash Storage (UFS).
Endurance: Limited program/erase cycles (10k–1M cycles/sector for NOR, ~1k–100k for NAND).
Wear Leveling: Algorithms to spread wear evenly, crucial for file systems.
3.4 Software/Embedded Use
- Firmware Updates (OTA): Store new firmware, use bootloader to switch/rollback.
- File systems: FAT, YAFFS, JFFS2, LittleFS designed for Flash’s block/erase constraints.
- Bad Block Management: ECC and remapping in drivers or hardware.
3.5 Use Cases
- Code/data storage in MCUs (e.g., STM32, ESP32 internal flash).
- SD card for data logging in IoT.
- SSDs in consumer laptops/servers.
3.6 What more can we do?
- SLC (Single-Level Cell) for endurance, MLC/TLC/QLC for density.
- Integrate with secure enclaves for encrypted storage.
- 3D NAND: stacking layers for even greater density.
4. EEPROM (Electrically Erasable Programmable ROM)
4.1 What is it?
- Non-volatile memory, byte-addressable, electrically erasable/programmed.
- Retains data for 10–100+ years.
4.2 Why we need it
- Store configuration, calibration, IDs, security keys that may change infrequently.
- Data survives power loss.
4.3 Hardware Details
Similar cell to Flash (floating-gate transistor), but individual bytes can be written/erased.
Write/erase speeds: ~1-10 ms/byte, compared to microseconds for RAM.
Endurance: 1M+ cycles per byte (less than RAM, more than Flash in some cases).
Common interfaces: I2C, SPI, parallel.
4.4 Software/Embedded Use
- Store user settings, device serials, error logs.
- Implement “wear leveling” in firmware to avoid frequent rewrites of same cell.
- Debounce writes: accumulate changes in RAM, commit infrequently.
4.5 Use Cases
- I2C EEPROM (e.g., 24Cxx chips) for external MCU storage.
- Storing device MAC addresses, production calibration.
- RFID tags, smartcards.
4.6 What more can we do?
- Use secure EEPROM for cryptographic elements (smartcards, TPM).
- Implement rolling logs/circular buffers in EEPROM for fail-safe logs.
5. Additional Advanced Types
5.1 NVRAM (Non-Volatile RAM)
- Battery-backed SRAM or modern MRAM/FRAM.
- Data retained after power loss.
- Used for RTCs, last-state retention in critical apps.
5.2 MRAM (Magnetoresistive RAM)
- Uses magnetic tunneling junctions to store bits (not electric charge).
- Non-volatile, unlimited endurance, SRAM-like speed.
- Still expensive, used in aerospace, automotive, and critical IoT.
5.3 FRAM (Ferroelectric RAM)
- Uses ferroelectric layer to store bits, non-volatile, extremely high write endurance.
- Used for fast, reliable log/parameter storage in low-power MCUs.
5.4 Software integration for all types:
- Memory-mapped I/O: Peripherals/flash mapped to CPU address space for direct access.
- RTOS/bootloader: Partition memory regions for code/data/upgrade slots.
- Memory drivers: HAL (Hardware Abstraction Layer) provides unified APIs for multiple memory chips.
6. System Integration and Security
Hardware
- Memory buses (parallel/serial): Impact bandwidth and latency.
- Address decoding: Maps physical memory devices to logical address spaces.
- Power domains: Isolate/retain critical memory across power states.
Software
- Memory allocators: Heap/stack control, dynamic allocation.
- Filesystem drivers: Flash-friendly algorithms, error recovery.
- Security: Isolate sensitive code/data in ROM/secure Flash; implement access control, encryption.
7. Comparison Table (Deeper Metrics)
Type | Volatility | Access granularity | Write speed | Read speed | Endurance | Use cases |
---|---|---|---|---|---|---|
SRAM | Volatile | Byte/Word | ns | ns | Unlimited | CPU cache, MCUs, FPGA blocks |
DRAM | Volatile | Byte/Word | 10s ns | 10s ns | Unlimited | Main memory (PCs, servers) |
ROM | Non-vol | Word/Block | N/A | ns | N/A | Boot code, fixed data |
PROM | Non-vol | Word/Block | Once | ns | Once | Permanent config |
EPROM | Non-vol | Word/Block | mins (UV) | ns | Many | Prototyping, legacy devices |
EEPROM | Non-vol | Byte | 1–10 ms | us | 1M cycles/byte | Params, IDs, calibration |
Flash | Non-vol | Block/Page | 0.1–1 ms/page | 10–100 us | 1k–1M cycles | Firmware, filesystems, storage |
MRAM | Non-vol | Byte | ns | ns | Unlimited | Critical log, code/data retention |
FRAM | Non-vol | Byte | ns | ns | 10^12+ cycles | RTC, logs, low-power config |
NVRAM | Non-vol* | Byte | ns | ns | Unlimited | RTC, last state, BIOS settings |
*Battery-backed NVRAM loses data if battery dies.